$ the-wire · showcase
FSDP2 CPU offload was silently corrupting parameters, and MILES gets FlashAttention
By RepoJournal · Filed · About Alignment & Post-training · Composed from the cited sources · methodology
Two operator-facing fixes land in verl and open-instruct: a FSDP2 offload path that quietly changed parameter values mid-run, and a CPUAdam toggle that lets GRPO train on consumer GPUs without editing source.
[fsdp] fix: prevent parameter corruption during FSDP2 CPU offload verl-project/verl
Moving FSDP2 models to CPU with uneven parameter shards could change parameter values silently, showing up as degraded evaluation accuracy in multi-node runs; the reporter traced it while debugging Qwen3-Omni training and evaluation failures. If you offload FSDP2 checkpoints to CPU, this is the fix to pull.
Add use_cpu_adam CLI toggle and offload validation for GRPO allenai/open-instruct
A new --use_cpu_adam flag on the DeepSpeed trainer (grpo_fast.py) selects DeepSpeedCPUAdam or AdamW via grpo_utils.create_optimizer, so GRPO is trainable on consumer GPUs without editing source. The config now also rejects CPUAdam without optimizer offload or without a DeepSpeed stage, and rejects optimizer offload without CPUAdam, since the default DeepSpeed configuration requires a CPU optimi...
Add FlashAttention 2 and 3 to the MILES runtime allenai/open-instruct
The MILES Dockerfile now builds FlashAttention 3 and 2 so attention kernels match the GPUs MILES actually launches on: Jupiter defaults to flash_3, Saturn to flash_2, and explicit backend choices plus the existing flash_4 default elsewhere are preserved. If your experiments run on Jupiter H100 or Saturn A100, the runtime now picks a compatible kernel for you.
[hardware, perf, doc] feat: move the TPU GRPO image to torchtitan ea7fec0f (jax 0.11.1, libtpu 0.0.50) and speed up the Qwen3-4B example (#8259) verl-project/verl
The TPU GRPO example moves to torchtitan ea7fec0f with jax 0.11.1 and libtpu 0.0.50, pointed at the verl-hardware-plugin commit supporting a standalone TPU TorchTitan engine, and the Qwen3-4B 100-step run gets 11% faster from three overlap settings. Only examples/tpu/grpo/ changes; core verl is untouched.
