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wire 2026-10-19
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ppc64le compiler preps for SIMD with F31 and vector registers

By RepoJournal · Filed · About Go · Composed from the cited sources · methodology

Go's compiler now encodes F31 and the vector register file for ppc64le, the groundwork commit that has to land before any SIMD enablement on that target.

cmd/compile: utilize regMask to use F31, vector regs golang/go

by Archana Ravindar

The compiler's regMask was capped at 64 entries, which is why F31 was never allocatable. Archana Ravindar lifts that block by adding F31 and the vector registers to the register encoding, and rewrites the two places that hardwired register V0 into reg-allocatable operands for LoweredQuadZero and its short variant, which the commit notes does not need ve. Register naming shifts with it: VS32-63 ...

Quick answers

What shipped in Go on October 19, 2026?
Go's compiler now encodes F31 and the vector register file for ppc64le, the groundwork commit that has to land before any SIMD enablement on that target. In total, 1 commits landed.
Who contributed to Go on October 19, 2026?
1 developer shipped this update, including Archana Ravindar.
What were the notable Go updates?
cmd/compile: utilize regMask to use F31, vector regs.